1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a metal layer in a semiconductor device and a method for fabricating the same.
2. Background of the Related Art
A related art metal layer in a semiconductor device and method for fabricating the same will be described with reference to the attached drawings. FIG. 1 illustrates a section showing a related art metal layer in a semiconductor device, and FIGS. 2Axcx9c2E illustrate sections showing the steps of a related art method for fabricating a metal layer in a semiconductor device.
Referring to FIG. 1, the related art metal layer in a semiconductor device is provided with an MOS transistor in a portion of an active region of a semiconductor substrate 1 having source/drain regions (not shown) and a gate electrode 2, and a capacitor electrode 3 of a metal in contact with the source region of the MOS transistor. There is a planar protection film 4 on an entire surface of the semiconductor substrate 1 having the MOS transistor and the capacitor electrode 3 formed thereon. And, there is an insulating layer 5 of silicon oxide on the planar protection film 4 inclusive of a region thereof over the gate electrode 2, and an absorber layer 6 of a metal on the insulating layer 5 inclusive of a region thereof over the gate electrode 2. The absorber layer 6 may be formed of a stack of layers of Al/Ti/TiN. There is a silicon nitride film 7 on an entire surface inclusive of the absorber layer 6 and the insulating layer 5. And, there is a via hole through the silicon nitride film 7, the insulating layer 5, and the planar protection film 4 to expose a region of the capacitor electrode 3. There is a tungsten plug 8a having a recess on a top thereof in the via hole. There is a mirror metal layer 9 on the silicon oxide film 7 and the tungsten plug 8a, with a gap at a region over the absorber layer 6. There is an oxide film spacer 11 in the gap of the mirror metal layer 9 and on the mirror metal layer 9 in the vicinity of the gap.
The related art method for fabricating the metal layer in a semiconductor device will be described.
Referring to FIG. 2, a planar protection film 4 is formed on an entire surface of a semiconductor substrate 1 provided with an MOS transistor in a portion of an active region of the semiconductor substrate 1 having source/drain regions (not shown) and a gate electrode 2, and a capacitor electrode 3 of a metal in contact with the source region of the MOS transistor. Then, a thin insulating layer 5 of silicon oxide (SiO2) is deposited on the planar protection film 4. Layers of Al/Ti/TiN are stacked on the insulating layer 5, and subjected to anisotropic etching to leave the layers of Al/Ti/TiN only on a region of the insulating layer 5, to form an absorber layer 6. Next, a silicon nitride film 7 is deposited on an entire surface inclusive of the absorber layer 6 to a thickness in a range of 3000xcx9c4000 xc3x85 by PECVD (Plasma Enhanced Chemical Vapor Deposition). And, a first photoresist film (not shown) is coated on the silicon nitride film 7, and selectively patterned by exposure and development, until a portion of the photoresist film on the capacitor electrode 3 is removed. Then, the patterned first photoresist film is used as mask in etching the silicon nitride film 7, the insulating layer 5, and the planar protection film 4 in succession, to form a via hole over the capacitor electrode 3. Then, the first photoresist film is removed. A tungsten layer 8 is formed on the silicon nitride film 7 inclusive of the via hole by chemical vapor deposition. Then, as shown in FIG. 2B, the tungsten layer 8 is etched back by CMP (Chemical Mechanical Polishing), to form a tungsten plug 8a. In this instance, a problem is caused in that a thickness of the tungsten plug 8a is reduced by 500 xc3x85 more. As shown in FIG. 2C, a mirror metal layer 9 of aluminum is sputtered on the silicon nitride film 7 inclusive of the tungsten plug 8a to a thickness of 1500 xc3x85. A second photoresist film is coated on the mirror metal layer 9, and selectively patterned to remove a portion thereof by exposure and development. The portion selectively removed is a portion under which a gap of the mirror metal layer 9 is to be formed. As shown in FIG. 2D, the patterned second photoresist film is used as a mask in subjecting the mirror metal layer 9 to anisotropic etching until the silicon nitride film 7 is exposed, for providing a gap of intaglio form in the metal layer 9. Then, the second photoresist film is removed. However, it is difficult to minimize the gap due to reflection at the mirror metal layer 9 when the mirror metal layer 9 is etched. Then, a silicon oxide film is deposited on an entire surface of the mirror metal layer 9, and removed by photo etching, to leave the silicon oxide film only in the gap in the mirror metal layer 9 and on the mirror metal layer 9 in the vicinity of the gap, to form an oxide film spacer 11.
However, the related art metal layer in a semiconductor device and method for fabricating the same have the following problems.
First, the difficulty in obtaining a minimized gap space caused by the use of photo etching in etching the mirror metal layer, with a reduction of mirror fill factor, results in difficulty in obtaining a high light transmission factor.
Second, the loss of the tungsten plug in the via hole, that impedes a complete planarization of the mirror metal layer, deteriorates an optical contrast.
Third, the formation of the tungsten plug by CMP causes damage to the silicon nitride film, that in turn causes a problem of forming a residual image in a light transmission, and pushes up production cost.
Accordingly, the present invention is directed to a metal layer in a semiconductor device and a method for fabricating the same that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide a metal layer in a semiconductor device and a method for fabricating the same, which improves an optical transmission factor and an optical contrast.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, the metal layer in a semiconductor device having a transistor and a capacitor electrode formed on a region of a semiconductor substrate includes a planar protection film on an entire surface of the semiconductor substrate inclusive of the transistor and the capacitor electrode, an absorber layer over the planar protection film inclusive of a region over the transistor, an insulating film on an entire surface, with a width of projection in a relievo form in a region over the absorber layer, a via hole through the planar protection film and the insulating layer, to expose a region of the capacitor electrode, a tungsten plug and a planar stuffed layer in the via hole, a mirror metal layer on the insulating film on both sides of the projection of a relievo form of the insulating film, inclusive of the planar stuffed layer, and an insulating film spacer on the projection of a relievo form of the insulating film and the mirror metal layer in the vicinity of the projection.
In another aspect of the present invention, there is provided a method for fabricating a metal layer in a semiconductor device having a transistor and a capacitor electrode formed on a region of a semiconductor substrate, including the steps of (1) forming a planar protection film on an entire surface of the semiconductor substrate inclusive of the transistor and the capacitor electrode, (2) forming an absorber layer over the planar protection film inclusive of a region over the transistor, (3) forming an insulating film on an entire surface, with a width of projection in a relievo form in a region over the absorber layer, (4) forming a via hole through the planar protection film and the insulating film, to expose the capacitor electrode, (5) forming a tungsten plug and a planar stuffed layer in the via hole, (6) forming a mirror metal layer on the insulating film on both sides of the projection of a relievo form of the insulating film, inclusive of the planar stuffed layer, and (7) forming an insulating film spacer on the projection of a relievo form of the insulating film and the mirror metal layer in the vicinity of the projection.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.